An FPGA-based low-cost frame grabber for image processing applications

Donglai Xu; Said Boussakta; John P.  Bentley

doi:10.1109/ICECS.2000.911549

An FPGA-based low-cost frame grabber for image processing applications

Donglai Xu, Said Boussakta, John P. Bentley

SCEDT Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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Abstract

This paper presents a low-cost frame grabber, which was specifically designed as part of a real-time motion detection system for high-resolution images. The frame grabber is FPGA-based to minimise size of the PCB and improve reliability of the system. It also acts as a backend add-on card for an IBM-PC compatible. The experimental tests carried out on different machines show that the board implemented meets all specifications required by the system, and performs well. The captured frames are clear, well contrasted and jitter-free in both live and still video modes and their quality is comparable to that available from equivalent commercial systems.

Original language	English
Title of host publication	ICECS 2000
Subtitle of host publication	7th IEEE international conference on electronics, circuits & systems
Pages	333-336
Volume	I-II
DOIs	https://doi.org/10.1109/ICECS.2000.911549
Publication status	Published - 2000
Event	7th IEEE International Conference on Electronics, Circuits and Systems - Jourieh, Lebanon Duration: 17 Dec 2000 → 20 Dec 2000 Conference number: 7

Conference

Conference	7th IEEE International Conference on Electronics, Circuits and Systems
Country/Territory	Lebanon
City	Jourieh
Period	17/12/00 → 20/12/00

Bibliographical note

Author can archive publisher's version/PDF.

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10.1109/ICECS.2000.911549

Full textFinal published version, 285 KBLicence: CC BY-NC-ND

http://ieeexplore.ieee.org/document/911549/

Cite this

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title = "An FPGA-based low-cost frame grabber for image processing applications",

abstract = "This paper presents a low-cost frame grabber, which was specifically designed as part of a real-time motion detection system for high-resolution images. The frame grabber is FPGA-based to minimise size of the PCB and improve reliability of the system. It also acts as a backend add-on card for an IBM-PC compatible. The experimental tests carried out on different machines show that the board implemented meets all specifications required by the system, and performs well. The captured frames are clear, well contrasted and jitter-free in both live and still video modes and their quality is comparable to that available from equivalent commercial systems.",

author = "Donglai Xu and Said Boussakta and Bentley, {John P.}",

note = "Author can archive publisher's version/PDF.; 7th IEEE International Conference on Electronics, Circuits and Systems ; Conference date: 17-12-2000 Through 20-12-2000",

year = "2000",

doi = "10.1109/ICECS.2000.911549",

language = "English",

volume = "I-II",

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AU - Xu, Donglai

AU - Boussakta, Said

AU - Bentley, John P.

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PY - 2000

Y1 - 2000

N2 - This paper presents a low-cost frame grabber, which was specifically designed as part of a real-time motion detection system for high-resolution images. The frame grabber is FPGA-based to minimise size of the PCB and improve reliability of the system. It also acts as a backend add-on card for an IBM-PC compatible. The experimental tests carried out on different machines show that the board implemented meets all specifications required by the system, and performs well. The captured frames are clear, well contrasted and jitter-free in both live and still video modes and their quality is comparable to that available from equivalent commercial systems.

AB - This paper presents a low-cost frame grabber, which was specifically designed as part of a real-time motion detection system for high-resolution images. The frame grabber is FPGA-based to minimise size of the PCB and improve reliability of the system. It also acts as a backend add-on card for an IBM-PC compatible. The experimental tests carried out on different machines show that the board implemented meets all specifications required by the system, and performs well. The captured frames are clear, well contrasted and jitter-free in both live and still video modes and their quality is comparable to that available from equivalent commercial systems.

U2 - 10.1109/ICECS.2000.911549

DO - 10.1109/ICECS.2000.911549

M3 - Conference contribution

VL - I-II

SP - 333

EP - 336

BT - ICECS 2000

T2 - 7th IEEE International Conference on Electronics, Circuits and Systems

Y2 - 17 December 2000 through 20 December 2000

ER -

An FPGA-based low-cost frame grabber for image processing applications

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