An FPGA-based low-cost frame grabber for image processing applications

Donglai Xu, Said Boussakta, John P. Bentley

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Abstract

This paper presents a low-cost frame grabber, which was specifically designed as part of a real-time motion detection system for high-resolution images. The frame grabber is FPGA-based to minimise size of the PCB and improve reliability of the system. It also acts as a backend add-on card for an IBM-PC compatible. The experimental tests carried out on different machines show that the board implemented meets all specifications required by the system, and performs well. The captured frames are clear, well contrasted and jitter-free in both live and still video modes and their quality is comparable to that available from equivalent commercial systems.
Original languageEnglish
Title of host publicationICECS 2000
Subtitle of host publication7th IEEE international conference on electronics, circuits & systems
Pages333-336
VolumeI-II
DOIs
Publication statusPublished - 2000
Event7th IEEE International Conference on Electronics, Circuits and Systems - Jourieh, Lebanon
Duration: 17 Dec 200020 Dec 2000
Conference number: 7

Conference

Conference7th IEEE International Conference on Electronics, Circuits and Systems
CountryLebanon
CityJourieh
Period17/12/0020/12/00

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    Xu, D., Boussakta, S., & Bentley, J. P. (2000). An FPGA-based low-cost frame grabber for image processing applications. In ICECS 2000: 7th IEEE international conference on electronics, circuits & systems (Vol. I-II, pp. 333-336) https://doi.org/10.1109/ICECS.2000.911549