Constructing hardware/software interface using protocol converters

Shengchao  Qin; Zongyan  Qiu; Jifeng  He

doi:10.1109/APAQS.2001.990012

Constructing hardware/software interface using protocol converters

Shengchao Qin, Zongyan Qiu, Jifeng He

SCEDT School Executive Team

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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Abstract

Hardware/software partition is a critical phase in hardware/software co-design. This paper proposes a hybrid partitioning framework, in which we design a set of protocol converters to construct the interface component between the hardware and software components, and reuse the formerly well-built partitioning rules by introducing protocol converters and rewriting them for this hybrid framework. The hardware components generated by our partitioning process are coded directly in Verilog HDL, which will greatly facilitate the further compilation from it down to netlists.

Original language	English
Title of host publication	Second Asia-Pacific conference on quality software, Proceedings
Publisher	IEEE
Pages	141-148
DOIs	https://doi.org/10.1109/APAQS.2001.990012
Publication status	Published - 2001
Event	2nd Asia-Pacific Conference on Quality Software - , Hong Kong Duration: 10 Dec 2001 → 11 Dec 2001

Conference

Conference	2nd Asia-Pacific Conference on Quality Software
Country/Territory	Hong Kong
Period	10/12/01 → 11/12/01

Bibliographical note

Author can archive publisher's version/PDF.

Access to Document

10.1109/APAQS.2001.990012

Full textFinal published version, 260 KBLicence: CC BY-NC-ND

http://ieeexplore.ieee.org/document/990012/

Cite this

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title = "Constructing hardware/software interface using protocol converters",

abstract = "Hardware/software partition is a critical phase in hardware/software co-design. This paper proposes a hybrid partitioning framework, in which we design a set of protocol converters to construct the interface component between the hardware and software components, and reuse the formerly well-built partitioning rules by introducing protocol converters and rewriting them for this hybrid framework. The hardware components generated by our partitioning process are coded directly in Verilog HDL, which will greatly facilitate the further compilation from it down to netlists.",

author = "Shengchao Qin and Zongyan Qiu and Jifeng He",

note = "Author can archive publisher's version/PDF. ; 2nd Asia-Pacific Conference on Quality Software ; Conference date: 10-12-2001 Through 11-12-2001",

year = "2001",

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language = "English",

pages = "141--148",

booktitle = "Second Asia-Pacific conference on quality software, Proceedings",

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N1 - Author can archive publisher's version/PDF.

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Y1 - 2001

N2 - Hardware/software partition is a critical phase in hardware/software co-design. This paper proposes a hybrid partitioning framework, in which we design a set of protocol converters to construct the interface component between the hardware and software components, and reuse the formerly well-built partitioning rules by introducing protocol converters and rewriting them for this hybrid framework. The hardware components generated by our partitioning process are coded directly in Verilog HDL, which will greatly facilitate the further compilation from it down to netlists.

AB - Hardware/software partition is a critical phase in hardware/software co-design. This paper proposes a hybrid partitioning framework, in which we design a set of protocol converters to construct the interface component between the hardware and software components, and reuse the formerly well-built partitioning rules by introducing protocol converters and rewriting them for this hybrid framework. The hardware components generated by our partitioning process are coded directly in Verilog HDL, which will greatly facilitate the further compilation from it down to netlists.

U2 - 10.1109/APAQS.2001.990012

DO - 10.1109/APAQS.2001.990012

M3 - Conference contribution

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EP - 148

BT - Second Asia-Pacific conference on quality software, Proceedings

PB - IEEE

T2 - 2nd Asia-Pacific Conference on Quality Software

Y2 - 10 December 2001 through 11 December 2001

ER -

Constructing hardware/software interface using protocol converters

Abstract

Conference

Bibliographical note

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Cite this