Precision Improvement of Power-Efficient Capacitive Senor Readout Circuit Using Multi-Nested Clocks

Keyphrases

• Power Efficient 100%
• Readout Circuit 100%
• Senor 100%
• Precision Improvement 100%
• Nonlinearity 50%
• Sensing Element 33%
• Charge Injection 33%
• Loop Architecture 33%
• Capacitive Sensor 33%
• Input Offset 33%
• Closed-loop 16%
• Measurement Results 16%
• BCD Process 16%
• MEMS Accelerometer 16%
• Fabrication Methods 16%
• Femto 16%
• Capacitance Variation 16%
• Food Animal Residue Avoidance Databank (FARAD) 16%
• High Power Efficiency 16%
• Clocking Scheme 16%
• Equivalent Input 16%
• Sensing Electrode 16%
• Operating Voltage 16%
• Wire Electrode 16%
• Timing Mismatch 16%
• Coupling Capacitance 16%

Engineering

• Capacitive 100%
• Readout Circuit 100%
• Nonlinearity 50%
• Sensing Element 33%
• Charge Injection 33%
• Open Loop Architecture 33%
• Microelectromechanical System 16%
• Sensing Electrode 16%
• Operating Voltage 16%
• Farad 16%
• Coupling Capacitance 16%