Abstract
Gate-All-Around (GAA) Nanowire MOSFET devices offer exceptional advantages, such as enhanced electron mobility, reduced power consumption, and faster switching speeds, making them highly suitable for advanced computing, IoT, and telecommunications applications. This study explores the design of various P-Channel Hetero-Dielectric Single-Metal GAA Nanowire devices utilizing tunable HfxTi1-xO2 high-k dielectric materials within a TCAD simulation environment. The proposed devices are designed with an 8nm radius, a 21nm channel length, and customizable high-k dielectrics. Different dielectric configurations are analyzed, demonstrating optimal electrical and digital performance. Notably, the engineered devices achieve a significant reduction in leakage current, lowering it from 10-9A to 10-14A compared to conventional GAA MOSFETs, making them highly effective for low-power applications.
| Original language | English |
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| Publication status | Published - 5 Jun 2025 |
| Event | 2025 International Conference on Electronics, AI and Computing : "Innovating for a Sustainable and Connected Future" - Dr B R Ambedkar National Institute of Technology Jalandhar, Punjab, India Duration: 5 Jun 2025 → 7 Jun 2025 |
Conference
| Conference | 2025 International Conference on Electronics, AI and Computing |
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| Abbreviated title | (EAIC) |
| Country/Territory | India |
| City | Punjab |
| Period | 5/06/25 → 7/06/25 |